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lt1158 1 half bridge n-channel power mosfet driver n drives gate of top side mosfet above v + n operates at supply voltages from 5v to 30v n 150ns transition times driving 3000pf n over 500ma peak driver current n adaptive non-overlap gate drives n continuous current limit protection n auto shutdown and retry capability n internal charge pump for dc operation n built-in gate voltage protection n compatible with current-sensing mosfets n ttl/cmos input levels n fault output indication a single input pin on the lt1158 synchronously controls two n-channel power mosfets in a totem pole configura- tion. unique adaptive protection against shoot-through currents eliminates all matching requirements for the two mosfets. this greatly eases the design of high efficiency motor control and switching regulator systems. a continuous current limit loop in the lt1158 regulates short-circuit current in the top power mosfet. higher start-up currents are allowed as long as the mosfet v ds does not exceed 1.2v. by returning the fault output to the enable input, the lt1158 will automatically shut down in the event of a fault and retry when an internal pull-up current has recharged the enable capacitor. an on-chip charge pump is switched in when needed to turn on the top n-channel mosfet continuously. special circuitry ensures that the top side gate drive is safely maintained in the transition between pwm and dc opera- tion. the gate-to-source voltages are internally limited to 14.5v when operating at higher supply voltages. features descriptio n u top and bottom gate waveforms + + + r sense 0.015 w 500 m f low esr 0.1 m f irfz34 irfz34 24v 1n4148 10 m f 1 m f 0.01 m f pwm 0hz to 100khz boost boost dr t gate dr t gate fb t source sense + sense b gate dr b gate fb gnd v + v + input enable fault bias lt1158 + load lt1158 ta01 typical applicatio n u v in = 24v r l = 12 w 1158 ta02 n pwm of high current inductive loads n half bridge and full bridge motor control n synchronous step-down switching regulators n three-phase brushless motor drive n high current transducer drivers n battery-operated logic-level mosfets applicatio n s u
lt1158 2 order part number lt1158cn lt1158in lt1158cs LT1158IS q ja = 70 c/w q ja = 110 c/w top view s package 16-lead plastic sol 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost dr v + bias enable fault input gnd b gate fb boost t gate dr t gate fb t source sense + sense ? v + b gate dr 1 2 3 4 5 6 7 8 top view n package 16-lead plastic dip 16 15 14 13 12 11 10 9 boost dr v + bias enable fault input gnd b gate fb boost t gate dr t gate fb t source sense + sense ? v + b gate dr lt1158i lt1158c symbol parameter conditions min typ max min typ max units i 2 + i 10 dc supply current (note 2) v + = 30v, v16 = 15v, v4 = 0.5v 2.2 3 2.2 3 ma v + = 30v, v16 = 15v, v6 = 0.8v 4.5 7 10 4.5 7 10 ma v + = 30v, v16 = 15v, v6 = 2v 8 13 18 8 13 18 ma i 16 boost current v + = v13 = 30v, v16 = 45v, v6 = 0.8v 3 4.5 3 4.5 ma v6 input threshold l 0.8 1.4 2 0.8 1.4 2 v i 6 input current v6 = 5v l 515 5 15 m a v4 enable low threshold v6 = 0.8v, monitor v9 l 0.9 1.15 1.4 0.85 1.15 1.4 v d v4 enable hysteresis v6 = 0.8v, monitor v9 l 1.3 1.5 1.7 1.2 1.5 1.8 v i 4 enable pullup current v4 = 0v l 15 25 35 15 25 35 m a v15 charge pump voltage v + = 5v, v6 = 2v, pin 16 open, v13 ? 5v l 9 11 9 11 v v + = 30v, v6 = 2v, pin16 open, v13 ? 30v l 40 43 47 40 43 47 v v9 bottom gate on voltage v + = v16 = 18v, v6 = 0.8v l 12 14.5 17 12 14.5 17 v v1 boost drive voltage v + = v16 = 18v, v6 = 0.8v, 100ma pulsed load l 12 14.5 17 12 14.5 17 v consult factory for military grade parts. absolute m axi m u m ratings w ww u supply voltage (pins 2, 10) .................................... 36v boost voltage (pin 16)............................................ 56v continuous output currents (pins 1, 9, 15) ....... 100ma sense voltages (pins 11, 12)................... C5v to v + +5v top source voltage (pin 13).................... C5v to v + +5v boost to source voltage (v16 C v13) ....... C0.3v to 20v operating temperature range lt1158c ................................................ 0 c to 70 c lt1158i ............................................ C40 c to 85 c junction temperature (note 1) lt1158c .......................................................... 125 c lt1158i ........................................................... 150 c storage temperature range ................ C65 c to 150 c lead temperature (soldering, 10 sec.)................ 300 c package/order i n for m atio n w u u open, gate feedback pins connected to gate drive pins unless otherwise specified. electrical characteristics test circuit, t a = 25 c, v + = v16 = 12v, v11 = v12 = v13 = 0v, pins 1 and 4
lt1158 3 temperature (?) ?0 8 10 14 25 75 lt 1158 g02 6 4 ?5 0 50 100 125 2 0 12 supply current (ma) i 2 + i 10 + i 16 v + = 12v input high input low enable low supply voltage (v) 0 8 10 12 30 lt1158 g01 6 4 10 20 40 2 0 14 i 2 + i 10 + i 16 enable low supply current (ma) 51525 35 input low input high v13 = 0v v13 = v + input frequency (khz) 1 0 supply current (ma) 5 10 15 20 30 10 100 lt1158 g03 25 50% duty cycle c gate = 3000pf v + = 24v v + = 6v v + = 12v dc supply current dc supply current dynamic supply current (v + ) typical perfor m a n ce characteristics u w test circuit, t a = 25 c, v + = v16 = 12v, v11 = v12 = v13 = 0v, pins 1 and 4 electrical characteristics the l denotes specifications that apply over the full operating temperature range. note 1: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formulas: lt1158in, lt1158cn: t j = t a + (p d 70 c/w) LT1158IS, lt1158cs: t j = t a + (p d 110 c/w) note 2: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. see typical performance characteristics and applications information. note 3: gate rise times are measured from 2v to 10v, delay times are measured from the input transition to when the gate voltage has decreased to 10v, and fall times are measured from 10v to 2v. lt1158i lt1158c symbol parameter conditions min typ max min typ max units v14 C v13 top turn-off threshold v + = v16 = 5v, v6 = 0.8v 1 1.75 2.5 1 1.75 2.5 v v8 bottom turn-off threshold v + = v16 = 5v, v6 = 2v 1 1.5 2 1 1.5 2 v i 5 fault output leakage v + = 30v, v16 = 15v, v6 = 2v l 0.1 1 0.1 1 m a v5 fault output saturation v + = 30v, v16 = 15v, v6 = 2v, i5 = 10ma 0.5 1 0.5 1 v v12 C v11 fault conduction threshold v + = 30v, v16 = 15v, v6 = 2v, i5 = 100 m a 90 110 130 85 110 135 mv v12 C v11 current limit threshold v + = 30v, v16 = 15v, v6 = 2v, closed loop 130 150 170 120 150 180 mv l 120 180 120 180 mv v12 C v11 current limit inhibit v + = v12 = 12v, v6 = 2v, decrease v11 1.1 1.25 1.4 1.1 1.25 1.4 v v ds threshold until v15 goes low t r top gate rise time pin 6 (+) transition, meas. v15 C v13 (note 3) l 130 250 130 250 ns t d top gate turn-off delay pin 6 (C) transition, meas. v15 C v13 (note 3) l 350 550 350 550 ns t f top gate fall time pin 6 (C) transition, meas. v15 C v13 (note 3) l 120 250 120 250 ns t r bottom gate rise time pin 6 (C) transition, meas. v9 (note 3) l 130 250 130 250 ns t d bottom gate turn-off delay pin 6 (+) transition, meas. v9 (note 3) l 200 400 200 400 ns t f bottom gate fall time pin 6 (+) transition, meas. v9 (note 3) l 100 200 100 200 ns open, gate feedback pins connected to gate drive pins unless otherwise specified.
lt1158 4 charge pump output voltage input thresholds enable thresholds supply voltage (v) 0 2.0 2.5 3.0 30 lt1158 g07 1.5 1.0 10 20 40 0.5 0 3.5 v(high) v(low) 40? +25? +85? 40? +25? +85? enable threshold voltage (v) 51525 35 fault conduction threshold supply voltage (v) 0 60 fault conduction threshold (mv) 70 90 100 110 160 130 10 20 25 lt1158 g08 80 140 150 120 515 30 35 40 v11 = 0v 40? +25? +85? current limit threshold supply voltage (v) 0 100 current limit threshold (mv) 110 130 140 150 200 170 10 20 25 lt1158 g09 120 180 190 160 515 30 35 40 closed loop +85? 40? +25? current limit inhibit v ds threshold supply voltage (v) 0 1.00 current limit inhibit threshold (v) 1.05 1.15 1.20 1.25 1.50 1.35 10 20 25 lt1158 g10 1.10 1.40 1.45 1.30 515 30 35 40 v2 ?v11 40? +25? +85? bottom gate rise time supply voltage (v) 0 bottom gate rise time (ns) 200 250 300 40 lt1158 g11 150 100 0 10 20 30 50 400 350 c gate = 10000pf c gate = 1000pf c gate = 3000pf 5152535 bottom gate fall time supply voltage (v) 0 bottom gate fall time (ns) 200 250 300 40 lt1158 g12 150 100 0 10 20 30 50 400 350 c gate = 10000pf c gate = 1000pf c gate = 3000pf 5152535 input frequency (khz) 1 0 supply current (ma) 5 10 15 20 40 10 100 lt1158 g04 25 30 35 c gate = 10000pf 50% duty cycle v + = 12v c gate = 1000pf c gate = 3000pf dynamic supply current supply voltage (v) 0 0 top gate voltage (v) 5 15 20 25 50 35 10 20 25 lt1158 g05 10 40 45 30 515 30 35 40 10 m a load no load supply voltage (v) 0 0.8 input threshold voltage (v) 1.0 1.2 1.4 1.6 10 20 30 40 lt1158 g06 1.8 2.0 5 15 25 35 v(high) v(low) 40? +25? +85? 40? +25? +85? typical perfor m a n ce characteristics u w
lt1158 5 supply voltage (v) 0 top gate rise time (ns) 200 250 300 40 lt1158 g13 150 100 0 10 20 30 50 400 350 c gate = 10000pf c gate = 1000pf c gate = 3000pf 5152535 top gate rise time top gate fall time supply voltage (v) 0 top gate fall time (ns) 200 250 300 40 lt1158 g14 150 100 0 10 20 30 50 400 350 c gate = 10000pf c gate = 1000pf c gate = 3000pf 5152535 transition times vs r gate gate resistance ( w ) 0 transition times (ns) 600 800 80 lt1158 g15 400 200 0 20 40 60 100 700 500 300 100 10 30 50 70 90 v + = 12v c gate = 3000pf rise time fall time pin 1 (boost drive): recharges and clamps the bootstrap capacitor to 14.5v higher than pin 13 via an external diode. pin 2 (v + ): main supply pin; must be closely decoupled to the ground pin 7. pin 3 (bias): decouple point for the internal 2.6v bias generator. pin 3 cannot have any external dc loading. pin 4 (enable): when left open, the lt1158 operates normally. pulling pin 4 low holds both mosfets off regardless of the input state. pin 5 (fault): open collector npn output which turns on when v12 C v11 exceeds the fault conduction threshold. pin 6 (input): taking pin 6 high turns the top mosfet on and bottom mosfet off; pin 6 low reverses these states. an input latch captures each low state, ignoring an ensu- ing high until pin 13 has gone below 2.6v. pin 8 (bottom gate feedback): must connect directly to the bottom power mosfet gate. the top mosfet turn-on is inhibited until pin 8 has discharged to 1.5v. a hold-on current source also feeds the bottom gate via pin 8. pin 9 (bottom gate drive): the high current drive point for the bottom mosfet. when a gate resistor is used, it is inserted between pin 9 and the gate of the mosfet. pi fu ctio s u uu pin 10 (v + ): bottom side driver supply; must be con- nected to the same supply as pin 2. pin 11 (sense negative): the floating reference for the current limit comparator. connects to the low side of a current shunt or kelvin lead of a current-sensing mosfet. when pin 11 is within 1.2v of v + , current limit is inhibited. pin 12 (sense positive): connects to the high side of the current shunt or sense lead of a current-sensing mosfet. a built-in offset between pins 11 and 12 in conjunction with r sense sets the top mosfet short-circuit current. pin 13 (top source): top side driver return; connects to mosfet source and low side of the bootstrap capacitor. pin 14 (top gate feedback): must connect directly to the top power mosfet gate. the bottom mosfet turn-on is inhibited until v14 C v13 has discharged to 1.75v. an on- chip charge pump also feeds the top gate via pin 14. pin 15 (top gate drive): the high current drive point for the top mosfet. when a gate resistor is used, it is inserted between pin 15 and the gate of the mosfet. pin 16 (boost): top side driver supply; connects to the high side of the bootstrap capacitor and to a diode either from supply (v + < 10v) or from pin 1 (v + > 10v). typical perfor m a n ce characteristics u w
lt1158 6 + + v + v + 1 v + logic input + 2 bias gen 4 3 2.7v 1.2v 7.5v 5 6 7 gnd input 1.4v s r q q 7.5v 16 chg pump + t 14 13 12 11 10 110mv 9 + 8 b gate fb b 1.5v 15v b gate dr + r 1-shot 1-shot r o 2.6v s 1.75v boost t gate dr t gate fb t source sense + sense fault enable bias boost dr v + 1158 fd 25 m a v + 15v 15 fu n ctio n al diagra uu w
lt1158 7 (refer to functional diagram) whenever there is an input transition on pin 6, the lt1158 follows a logical sequence to turn off one mosfet and turn on the other. first, turn-off is initiated, then v gs is monitored until it has decreased below the turn-off thresh- old, and finally the other gate is turned on. an input latch gets reset by every low state at pin 6, but can only be set if the top source pin has gone low, indicating that there will be sufficient charge in the bootstrap capacitor to safely turn on the top mosfet. in order to conserve power, the gate drivers only provide turn-on current for up to 2 m s, set by internal one-shot circuits. each lt1158 driver can deliver 500ma for 2 m s, or 1000nc of gate charge CC more than enough to turn on multiple mosfets in parallel. once turned on, each gate is held high by a dc gate sustaining current: the bottom gate by a 100 m a current source, and the top gate by an on-chip charge pump running at approximately 500khz. the floating supply for the top side driver is provided by a bootstrap capacitor between the boost pin 16 and top source pin 13. this capacitor is recharged each time pin the lt1158 self-enables via an internal 25 m a pull-up on the enable pin 4. when pin 4 is pulled down, much of the input logic is disabled, reducing supply current to 2ma. with pin 4 low, the input state is ignored and both mosfet gates are actively held low. with pin 4 enabled, one or the other of the 2 mosfets is turned on, depending on the state of the input pin 6: high for top side on, and low for bottom side on. the 1.4v input threshold is regulated and has 200mv of hysteresis. in order to allow operation over 5v to 30v nominal supply voltages, an internal bias generator is employed to furnish constant bias voltages and currents. the bias generator is decoupled at pin 3 to eliminate any effects from switching transients. no dc loading is allowed on pin 3 . the top and bottom gate drivers in the lt1158 each utilize two gate connections: 1) a gate drive pin, which provides the turn-on and turn-off currents through an optional series gate resistor; and 2) a gate feedback pin which connects directly to the gate to monitor the gate-to-source voltage and supply the dc gate sustaining current. 0.01 m f lt1158 tc01 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost t gate dr t gate fb t source sense + sense v + b gate dr boost dr v + bias enable fault input gnd b gate fb + v + + 3000pf 1 m f + + v16 + v11 + v12 3000pf + v8 v6 50 w + v4 3k 1/2w 150 w 2w + v14 ?v13 lt1158 vn2222ll 100 w 10 m f closed loop 2k 1/2w test circuit operatio u
lt1158 8 (refer to functional diagram) 13 goes low in pwm operation, and is maintained by the charge pump when the top mosfet is on dc. a regulated boost driver at pin 1 employs a source-referenced 15v clamp that prevents the bootstrap capacitor from over- charging regardless of v + or output transients. the lt1158 provides a current-sense comparator and fault output circuit for protection of the top power mosfet. the comparator input pins 11 and 12 are normally con- nected across a shunt in the source of the top power mosfet (or to a current-sensing mosfet). when pin 11 is more than 1.2v below v + and v12 C v11 exceeds the 110mv offset, fault pin 5 begins to sink current. during a short circuit, the feedback loop regulates v12 C v11 to 150mv, thereby limiting the top mosfet current. power mosfet selection since the lt1158 inherently protects the top and bottom mosfets from simultaneous conduction, there are no size or matching constraints. therefore selection can be made based on the operating voltage and r ds(on) requirements. the mosfet bv dss should be at least 2 v supply , and should be increased to 3 v supply in harsh environments with frequent fault conditions. for the lt1158 maximum operating supply of 30v, the mosfet bv dss should be from 60v to 100v. the mosfet r ds(on) is specified at t j = 25 c and is generally chosen based on the operating efficiency re- quired as long as the maximum mosfet junction tem- perature is not exceeded. the dissipation in each mosfet is given by: p=di r ds ds on () + () ( ) 2 1 ? where d is the duty cycle and ? is the increase in r ds(on) at the anticipated mosfet junction temperature. from this equation the required r ds(on) can be derived: r p di ds on ds ( ) = () + () 2 1 ? for example, if the mosfet loss is to be limited to 2w when operating at 5a and a 90% duty cycle, the required r ds(on) would be 0.089 w /(1 + ? ). (1 + ? ) is given for each mosfet in the form of a normalized r ds(on) vs. tempera- ture curve, but ? = 0.007/ c can be used as an approxima- tion for low voltage mosfets. thus if t a = 85 c and the available heat sinking has a thermal resistance of 20 c/w, the mosfet junction temperature will be 125 c, and ? = 0.007(125 C 25) = 0.7. this means that the required r ds(on) of the mosfet will be 0.089 w /1.7 = 0.0523 w , which can be satisfied by an irfz34. note that these calculations are for the continuous oper- ating condition; power mosfets can sustain far higher dissipations during transients. additional r ds(on) con- straints are discussed under starting high in-rush cur- rent loads . paralleling mosfets figure 1. paralleling mosfets lt1158 r g r g r g : optional 10 w 1158 f01 gate dr gate fb when the above calculations result in a lower r ds(on) than is economically feasible with a single mosfet, two or more mosfets can be paralleled. the mosfets will inherently share the currents according to their r ds(on) ratio. the lt1158 top and bottom drivers can each drive four power mosfets in parallel with only a small loss in switching speeds (see typical performance characteris- tics). individual gate resistors may be required to decouple each mosfet from its neighbors to prevent operatio u applicatio n s i n for m atio n wu u u
lt1158 9 high frequency oscillations CC consult manufacturers rec- ommendations. if individual gate decoupling resistors are used, the gate feedback pins can be connected to any one of the gates. driving multiple mosfets in parallel may restrict the operating frequency at high supply voltages to prevent over-dissipation in the lt1158 (see gate charge and driver dissipation below). when the total gate capaci- tance exceeds 10,000pf on the top side, the bootstrap capacitor should be increased proportionally above 0.1 m f. gate charge and driver dissipation a useful indicator of the load presented to the driver by a power mosfet is the total gate charge q g , which includes the additional charge required by the gate-to-drain swing. q g is usually specified for v gs = 10v and v ds = 0.8v ds(max) . when the supply current is measured in a switching application, it will be larger than given by the dc electrical characteristics because of the additional supply current associated with sourcing the mosfet gate charge: ii dq dt dq dt supply dc g top g bottom =+ ? ? ? ? + ? ? ? ? the actual increase in supply current is slightly higher due to lt1158 switching losses and the fact that the gates are being charged to more than 10v. supply current vs. switching frequency is given in the typical performance characteristics. the lt1158 junction temperature can be estimated by using the equations given in note 1 of the electrical characteristics. for example, the lt1158si is limited to less than 25ma from a 24v supply: t j = 85 c + (25ma 24v 110 c/w) = 151 c exceeds absolute maximum in order to prevent the maximum junction temperature from being exceeded, the lt1158 supply current must be checked with the actual mosfets operating at the maxi- mum switching frequency. mosfet gate drive protection for supply voltages of over 8v, the lt1158 will protect standard n-channel mosfets from under or overvoltage gate drive conditions for any input duty cycle including dc. gate-to-source zener clamps are not required and not recommended since they can reduce operating efficiency. a discontinuity in tracking between the output pulse width and input pulse width may be noted as the top side mosfet approaches 100% duty cycle. as the input low signal becomes narrower, it may become shorter than the time required to recharge the bootstrap capacitor to a safe voltage for the top side driver. below this duty cycle the output pulse width will stop tracking the input until the input low signal is <100ns, at which point the output will jump to the dc condition of top mosfet on and bottom mosfet off. low voltage operation the lt1158 can operate from 5v supplies (4.5v min.) and in 6v battery-powered applications by using logic-level n-channel power mosfets. these mosfets have 2v maximum threshold voltages and guaranteed r ds(on) limits at v gs = 4v. the switching speed of the lt1158, unlike cmos drivers, does not degrade at low supply voltages. for operation down to 4.5v, the boost pin should be connected as shown in figure 2 to maximize gate drive to the top side mosfet. supply voltages over 10v should not be used with logic-level mosfets because of their lower maximum gate-to-source voltage rating. 0.1 m f + lt1158 f02 5v d1 d1: low-leakage schottky bat85 or equivalent logic-level mosfet n.c. boost t gate dr t gate fb t source lt1158 boost dr figure 2. low voltage operation applicatio n s i n for m atio n wu u u
lt1158 10 figure 3. adding synchronous switching to a step-down switching regulator ugly transient issues in pwm applications the drain current of the top mosfet is a square wave at the input frequency and duty cycle. to prevent large voltage transients at the top drain, a low esr electrolytic capacitor must be used and returned to the power ground. the capacitor is generally in the range of 250 m f to 5000 m f and must be physically sized for the rms current flowing in the drain to prevent heating and premature failure. in addition, the lt1158 requires a separate 10 m f capacitor connected closely between pins 2 and 7. the lt1158 top source and sense pins are internally protected against transients below ground and above supply. however, the gate drive pins cannot be forced below ground. in most applications, negative transients coupled from the source to the gate of the top mosfet do not cause any problems. however, in some high current (10a and above) motor control applications, negative transients on the top gate drive may cause early tripping of the current limit. a small schottky diode (bat85) from pin 15 to ground avoids this problem. switching regulator applications the lt1158 is ideal as a synchronous switch driver to improve the efficiency of step-down (buck) switching regulators. most step-down regulators use a high current schottky diode to conduct the inductor current when the switch is off. the fractions of the oscillator period that the switch is on (switch conducting) and off (diode conduct- ing) are given by: switch aono = v v total period switch aoffo = vv v total period out in in out in ? ? ? ? - ? ? ? ? note that for v in > 2v out , the switch is off longer than it is on, making the diode losses more significant than the switch. the worst case for the diode is during a short circuit, when v out approaches zero and the diode con- ducts the short-circuit current almost continuosly. figure 3 shows the lt1158 used to synchronously drive a pair of power mosfets in a step-down regulator applica- tion, where the top mosfet is the switch and the bottom mosfet replaces the schottky diode. since both conduc- tion paths have low losses, this approach can result in very high efficiency CC from 90% to 95% in most applications. and for regulators under 5a, using low r ds(on) n-channel mosfets eliminates the need for heatsinks. v out t gate dr t gate fb t source sense + sense b gate dr b gate fb fault input lt1158 + ref pwm r sense r gs + v in 1158 f03 applicatio n s i n for m atio n wu u u
lt1158 11 output current (a) 0 efficiency (%) 80 90 4.0 lt1158 f04 70 60 1.0 2.0 3.0 100 0.5 1.5 2.5 3.5 figure 12 circuit v in = 12v efficiency vs. output current for the figure 12 regulator with v in = 12v. current limit in switching regulator applications current is sensed by the lt1158 by measuring the voltage across a current shunt (low valued resistor). normally, this shunt is placed in the source lead of the top mosfet (see short-circuit protection in bridge applications ). however, in step-down switching regulator applications, the remote current sensing capability of the lt1158 allows the actual inductor current to be sensed. this is done by placing the shunt in the output lead of the inductor as shown in figure 3. routing of the sense + and sense C pc traces is critical to prevent stray pickup. these traces must be routed together at minimum spacing and use a kelvin connection at the shunt. when the voltage across r sense exceeds 110mv, the lt1158 fault pin begins to conduct. by feeding the fault signal back to a control input of the pwm, the lt1158 will assume control of the duty cycle forming a true current mode loop to limit the output current: i out = 110mv r in current limit sense in lt3525 based circuits, connecting the fault pin to the lt3525 soft-start pin accomplishes this function. in cir- cuits where the lt1158 input is being driven with a ramp or sawtooth, the fault pin is used to pull down the dc level of the input. the constant off-time circuits shown in figures 10 and 12 are unique in that they also use the current sense during normal operation. the lt1431 output reduces the normal lt1158 110mv fault conduction threshold such that the fault pin conducts at the required load current, thus discharging the input ramp capacitor. in current limit the lt1431 output turns off, allowing the fault conduction threshold to reach its normal value. the resistor r gs shown in figure 3 is necessary to prevent output voltage overshoot due to charge coupled into the gate of the top mosfet by a large start-up dv/dt on v in . if dc operation of the top mosfet is required, r gs must be 330k or greater to prevent loading the charge pump. one fundamental difference in the operation of a step- down regulator with synchronous switching is that it never becomes discontinuous at light loads. the inductor cur- rent doesnt stop ramping down when it reaches zero, but actually reverses polarity resulting in a constant ripple current independent of load. this does not cause any efficiency loss as might be expected, since the negative inductor current is returned to v in when the switch turns back on. the lt1158 performs the synchronous mosfet drive and current sense functions in a step-down switching regula- tor. a reference and pwm are required to complete the regulator. any voltage-mode pwm controller may be used, but the lt3525 is particularly well suited to high power, high efficiency applications such as the 10a circuit shown in figure 13. in higher current regulators a small schottky diode across the bottom mosfet helps to re- duce reverse-recovery switching losses. the lt1158 input pin can also be driven directly with a ramp or sawtooth. in this case, the dc level of the input waveform relative to the 1.4v threshold sets the lt1158 duty cycle. in the 5v to 3.3v converter circuit shown in figure 11, an lt1431 controls the dc level of a triangle wave generated by a cmos 555. the figure 10 and 12 circuits use an rc network to ramp the lt1158 input back up to its 1.4v threshold following each switch cycle, setting a constant off time. figure 4 shows the figure 4. typical efficiency curve for step-down regulator with synchronous switch applicatio n s i n for m atio n wu u u
lt1158 12 figure 5. adding zero current shutdown short-circuit protection in bridge applications the lt1158 protects the top power mosfet from output shorts to ground, or in a full bridge application, shorts across the load. both standard 3-lead mosfets and current-sensing 5-lead mosfets can be protected. the bottom mosfet is not protected from shorts to supply. current is sensed by measuring the voltage across a current shunt in the source lead of a standard 3-lead mosfet (figure 6). for the current-sensing mosfet low current shutdown the lt1158 may be shutdown to a current level of 2ma by pulling the enable pin 4 low. in this state both the top and bottom mosfets are actively held off against any tran- sients which might occur on the output during shutdown. this is important in applications such as 3-phase dc motor control when one of the phases is disabled while the other two are switching. if zero standby current is required and the load returns to ground, then a switch can be inserted into the supply path of the lt1158 as shown in figure 5. resistor r gs ensures that the top mosfet gate discharges, while the voltage across the bottom mosfet goes to zero. the voltage drop across the p-channel supply switch must be less than 300mv, and r gs must be 330k or greater for dc operation. this technique is not recommended for applications which require the lt1158 v ds sensing function. 100k v + v + lt1158 + vp0300 r gs 1158 f05 load gnd + to other control circuits cmos on/off 100k v + t gate dr t gate fb t source b gate dr b gate fb 2n2222 shown in figure 7, the sense resistor is inserted between the sense and kelvin leads. the sense + and sense C pc traces must be routed together at minimum spacing to prevent stray pickup, and a kelvin connection must be used at the current shunt for the 3- lead mosfet. using a twisted pair is the safest approach and is recommended for sense runs of several inches. when the voltage across r sense exceeds 110mv, the lt1158 fault pin begins to conduct, signaling a fault condition. the current in a short circuit ramps very rapidly, limited only by the series inductance and ultimately the mosfet and shunt resistance. due to the response time of the lt1158 current limit loop, an initial current spike of figure 7. short-circuit protection with current-sensing mosfet t gate dr t gate fb t source sense + sense fault lt1158 5v + v + 1158 f07 10k r sense kelvin sense output figure 6. short-circuit protection with standard mosfet t gate dr t gate fb t source sense + sense fault lt1158 r sense 5v + v + 1158 f06 10k applicatio n s i n for m atio n wu u u
lt1158 13 value of r sense for the 5-lead mosfet increases by the current sensing ratio (typically 1000 C 3000), thus elimi- nating the need for a low valued shunt. d v is in the range of 1v to 3v in most applications. assuming a dead short, the mosfet dissipation will rise to v supply i sc . for example, with a 24v supply and i sc = 10a, the dissipation would be 240w. to determine how long the mosfet can remain at this dissipation level before it must be shut down, refer to the soa curves given in the mosfet data sheet. for example, an irfz34 would be safe if shut down within 10ms. a tektronix a6303 current probe is highly recommended for viewing output fault currents. if short-circuit protection is not required in applications which do not require the current sense capability of the lt1158, the sense pins 11 and 12 should both be connected to pin 13, and the fault pin 5 left open. the enable pin 4 may still be used to shut down the device. note, however, that when unprotected the top mosfet can be easily (and often dramatically) destroyed by even a momentary short. self-protection with automatic restart when using the current sense circuits of figures 6 and 7, local shutdown can be achieved by connecting the fault pin through resistor r f to the enable pin as shown in figure 9. an optional thermostat mounted to the load or mosfet heatsink can also be used to pull enable low. an internal 25 m a current source normally keeps the en- able capacitor c en charged to the 7.5v clamp voltage (or to v + , for v + < 7.5v). when a fault occurs, c en is dis- charged to below the enable low threshold (1.15v typ.) which shuts down both mosfets. when the fault pin or thermostat releases, c en recharges to the upper enable threshold where restart is attempted. in a sustained short circuit, fault will again pull low and the cycle will repeat until the short is removed. the time to shut down for a dc input or thermal fault is given by: t shutdown = (100 + 0.8r f ) c en dc input if neither the enable nor input pins are pulled low in response to the fault indication, the top mosfet current will recover to a steady-state value i sc regulated by the lt1158 as shown in figure 8: standard 3-lead mosfet 5-lead mosfet from 2 to 5 times the final value will be present for a few m s, followed by an interval in which i ds = 0. the current spike is normally well within the safe operating area (soa) of the mosfet, but can be further reduced with a small (0.5 m h) inductor in series with the output. 5 m s/div lt1158 f08 5a/div i sc figure 8. top mosfet short-circuit turn-on current i sc = = = () - ? ? ? ? = () - ? ? ? ? ==- - - 150mv r r 150mv i i r 150mv r 1 150mv v r r 150mv i 1 150mv v sense ratio, v = v sense sense sc sc sense 2 sense sc 2 gs d d d r current v v gs t the time for the current to recover to i sc following the initial current spike is approximately q gs /0.5ma, where q gs is the mosfet gate-to-source charge. i sc need not be set higher than the required start-up current for motors (see starting high in-rush current loads ). note that the applicatio n s i n for m atio n wu u u
lt1158 14 t shutdown becomes more difficult to analyze when the output is shorted with a pwm input. this is because the fault pin only conducts when fault currents are actually present in the mosfet. fault does not conduct while the input is low in figures 6 and 7 or during the interval i ds = 0 in figure 8. thus t shutdown will safely increase when the duty cycle of the current in the top mosfet is low, maintaining the average mosfet current at a relatively constant level. the length of time following shutdown before restart is attempted is given by: t v a cc restart en en = ? ? ? ? = ? ? ? 15 25 610 4 . m in figure 9, the top mosfet would shut down after being in dc current limit for 0.9ms and try to restart at 60ms intervals, thus producing a duty cyle of 1.5% in short circuit. the resulting average top mosfet dissipation during a short is easily measured by taking the product of the supply voltage and the average supply current. starting high in-rush current loads the lt1158 has a v ds sensing function which allows more than i sc to flow in the top mosfet providing that the figure 9. self-protection with auto restart this calculation gives the minimum current which could be delivered with the irfz34 at t j = 125 c without activat- ing the fault pin on the lt1158. if more start current is required, using an irfz44 (r ds(on) = 0.028 w max.) would increase i start to over 15a at t j = 110 c, even though the short-circuit current remains at 5a. in order for the v ds sensing function to work properly, the supply pins for the lt1158 must be connected at the drain of the top mosfet, which must be properly decoupled (see ugly transient issues ). driving lamps incandescent lamps represent a challenging load because they have much in common with a short circuit when cold. the top gate driver in the lt1158 can be configured to turn on large lamps while still protecting the power mosfet note that for the first event only, t shutdown is approxi- mately twice the above value since c en is being discharged all the way from its quiescent voltage. allowable values for r f are from zero to 10k. fault lt1158 c en 1 m f + 1158 f09 r f 1k 7.5v 1.15v enable optional thermostat close on rise airpax #67fxxx 25 m a 7.5v sense C pin is within 1.2v of supply. under these condi- tions the current is limited only by the r ds(on) in series with r sense . for a 5-lead mosfet the current is limited by r ds(on) alone, since r sense is not in the output path (see figure 7). again adjusting r ds(on) for temperature, the worst-case start currents are: i v rr i v r start ds on sense start ds on = + () + = + () () () 12 1 12 1 . . ? ? properly sizing the mosfet for i start allows inductive loads with long time constants, such as motors with high mechanical inertia, to be started. returning to the example used in power mosfet selec- tion , an irfz34 (r ds(on) = 0.05 w max.) was selected for operation at 5a. if the short-circuit current is also set at 5a, what start current can be supported? from the equation for r sense , a 0.03 w shunt would be required, allowing the worst-case start current to be calculated: i v a start = () + = 12 17005 003 10 . .. . ww 5-lead mosfet 3-lead mosfet applicatio n s i n for m atio n wu u u
lt1158 15 from a true short. this is done by using the current limit to control cold filament current in conjunction with the self- protection circuit of figure 9. the reduced cold filament current also extends the life of the filament. a good guideline is to choose r sense to set i sc at approxi- mately twice the steady state on current of the lamp(s). t shutdown is then made long enough to guarantee that the lamp filaments heat and drop out of current limit before the enable capacitor discharges to the enable low threshold. for a short circuit, the enable capacitor will continue to discharge below the threshold, shutting down the top mosfet. the lt1158 will then go into the automatic restart mode described in self-protection with automatic restart above. the time constant for an incandescent filament is tens of milliseconds, which means that t shutdown will have to be longer than in most other applications. this places in- creased soa demands on the mosfet during a short circuit, requiring that a larger than normal device be used. a protected high current lamp driver application is shown in figure 18. 0.01 m f lt1158 f10 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost t gate dr t gate fb t source sense + sense v + b gate dr boost dr v + bias enable fault input gnd b gate fb lt1158 + 1n4148 10 m f 24k 1000pf 0.05 m f 1k 510 w 1n4148 1 2 3 4 8 7 6 5 lt1431 + 1000 m f low esr 500 m f low esr r s 0.015 w l1 22 m h short-circuit current = 8a 200pf +3.3v/6a output 5v to 10v input (use logic-level q1, q2) 8v to 20v input (use standard q1, q2 and connect boost diode to pin 1) q1 680k + 0.1 m f 100 w 100 w q2 vp0300 insert for zero power shutdown 100k cmos on/off 2n2222 + 100k q1, q2: irlz44 (logic-level) irfz44 (standard) l1: hurricane lab hl-kk122t/bb r s : vishay/dale type lvr-3 vishay/ultronix rcs01, sm1 isotek corp. isa-plan smr constant off time current mode control loop frequency = where t off ? 10 m s 1 t off ( ) 1 ? v out v in 4.99k 1% 1.62k 1% figure 10. high efficiency 3.3v step-down switching regulator (requires no heatsinks) applicatio n s i n for m atio n wu u u typical applicatio n s u
lt1158 16 0.01 m f lt1158 f12 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost t gate dr t gate fb t source sense + sense v + b gate dr boost dr v + bias enable fault input gnd b gate fb lt1158 + + 1n4148 10 m f 24k 1000pf 0.05 m f 1k 510 w 1n4148 1 2 3 4 8 7 6 5 lt1431 1000 m f low esr 500 m f low esr r s 20m w short-circuit current = 6a +5v/4a output 8v to 20v input irfz34 510k + 0.1 m f l1: coiltronics ctx50-5-52 r s : vishay/dale type lvr-3 vishay/ultronix rcs01, sm1 isotek corp. isa-plan smr constant off time current mode control loop frequency = where t off ? 10 m s vp0300 insert for zero power shutdown 100k cmos on/off see figure 4 for efficiency curve 100 w 100 w irfz44 l1 50 m h + 2n2222 100k 1 t off ( ) 1 ? v out v in figure 12. high efficiency 5v step-down switching regulator (requires no heatsinks) 200pf 1000pf lt1158 f11 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost t gate dr t gate fb t source sense + sense v + b gate dr boost dr v + bias enable fault input gnd b gate fb lt1158 + 0.01 m f 10 m f 0.33? driver supply 10v to 15v (can be powered from v in with logic-level q1, q2) 24k 0.01 m f 1 2 3 4 8 7 6 5 lt1431 + 330 m f 6.3v avx 4 220 m f 10v os-con 4 r s l1 8 m h 0.01 w ea short-circuit current = 22a v out 15a v in 4.5v to 6v 500k 0.22 m f 1 2 3 4 8 7 6 5 cmos 555 r x 1% 4.99k 1% 16k 470pf + q1, q2: mtb75n05hd (use with 10v to 15v driver supply) mtb75n03hdl (use with v in driver suply) cmos 555: lmc555 or tlc555 l1: coiltronics ctx02-12171-1 r s : krl/bantry sl-1r010j 2 q2 3.3k + shutdown q1 bas16 v out r x (1%) 2.90v 806 w 3.05v 1.10k 3.30v 1.62k 3.45v 1.91k 3.60v 2.21k figure 11. 5v to 3.xxv,15a converter (uses pc board area for heatsink) typical applicatio n s u
lt1158 17 figure 14. potentiometer-adjusted open loop motor speed control with short-circuit protection 330pf lt1158 f13 + 0.01 m f 4.7k 1 m f + 1000 m f low esr 500 m f ea low esr r s 0.007 w l1 70 m h short-circuit current = 15a 5v or 12v * input 30v max irfz44 330k 0.1 m f 10k 30k 10 m f * add these components to implement low-dropout 12v regulator l1: magnetics core #55585-a2 30 turns 14ga magnet wire mbr340 27k 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost t gate dr t gate fb t source sense + sense v + b gate dr boost dr v + bias enable fault input gnd b gate fb lt1158 510 w 1n4148 1n4148 1n4148 1 m f 2.2nf 0.1 m f 3.4k * * ext sync 0.01 m f 0.01 m f + 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 lt3525 + 4.7k shutdown + r s : dale type lvr-3 ultronix rcs01 (2) irfz44 + f = 25khz + 2.2nf lt1158 f14 + 0.01 m f 5.1k 1000 m f low esr 24 w start current = 15a minimum 10v to 30v 24 w 0.1 m f 10 m f the cmos 555 is used as a 25khz triangle-wave oscillator driving the lt1158 input pin. the d.c. level of the triangle wave is set by the potentiometer on the cmos 555 supply pin, and allow adjustment of the lt1158 duty cycle from 0 to 100%. cmos 555: lmc555 or tlc555 q1, q2: mtp35n06e 13k 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost t gate dr t gate fb t source sense + sense v + b gate dr boost dr v + bias enable fault input gnd b gate fb lt1158 510 w 1n4148 1 m f motor speed 0 to 100% 0.33 m f + 10k + + 1 2 3 4 8 7 6 5 cmos 555 1n5231a q1 q2 0.02 w 7.5k 1k m figure 13. 90% efficiency 24v to 5v 10a switching regulator 95% efficiency 24v to 12v 10a low dropout switching regulator typical applicatio n s u
lt1158 18 figure 15. high efficiency 6-cell nicd protected motor drive bat85 lt1158 f15 0.01 m f 15 w start current = 25a minimum 15 w 0.1 m f q2 q1, q2: irlz44 (logic-level) r s : dale type lvr-3 ultronix rcs01 1k 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost t gate dr t gate fb t source sense + sense v + b gate dr boost dr v + bias enable fault input gnd b gate fb lt1158 r s 0.015 w 1n4148 + q1 stop (free run) pwm 100 m f + 7.2v nominal + 10 m f + 1 m f m position feedback controls lt1158 enable inputs f a 5v 1158 f16 enable fault input lt1158 v + enable fault input lt1158 v + enable fault input lt1158 v + f b f c shutdown pwm controls lt1158 inputs commutating logic figure 16. 3-phase brushless dc motor control typical applicatio n s u
lt1158 19 control logic for locked anti-phase drive motor stops if either side is shorted to ground control logic for sign/magnitude drive + 1 m f 1n4148 pwm direction stop (free run) enable a input a fault a enable b input b fault b 74hc02 1158f17b 0.1 m f 1n4148 pwm 5v enable a input a fault a enable b input b fault b 74hc132 1158f17c 5.1k 0.01 m f 150k figure 17. 10a full bridge motor control information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. typical applicatio n s u lt1158 f17a + 0.01 m f low esr 15 w side b: shows current-sensing mosfet connection 10v to 30v 0.1 m f q1, q3: irf540 (standard) irc540 (sense fet) q2, q4: irfz44 d1, d2: bat83 r s : dale type lvr-3 ultronix rcs01 1n4148 + + q2 0.01 m f 15 w 15 w 10 m f 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost t gate dr t gate fb t source sense + sense v + b gate dr boost dr v + bias enable fault input gnd b gate fb lt1158 1n4148 q1 q4 r s 0.015 w 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost t gate dr t gate fb t source sense + sense v + b gate dr boost dr v + bias enable fault input gnd b gate fb lt1158 q3 + enable a input a fault a enable b input b fault b 10 m f 470 m f low esr 470 m f 15 w 2.4k 2.4k 0.1 m f + d1 47 w d2 side a: shows standard mosfet connection + m
lt1158 20 figure 18. high current lamp driver with short-circuit protection s package 16-lead plastic sol note 1 0.398 ?0.413 (10.109 ?10.490) (note 2) 16 15 14 13 12 11 10 9 1 23 4 5 6 78 0.394 ?0.419 (10.007 ?10.643) 0.037 ?0.045 (0.940 ?1.143) 0.004 ?0.012 (0.102 ?0.305) 0.093 ?0.104 (2.362 ?2.642) 0.050 (1.270) typ 0.014 ?0.019 (0.356 ?0.482) typ 0??8?typ note 1 0.005 (0.127) rad min 0.009 ?0.013 (0.229 ?0.330) 0.016 ?0.050 (0.406 ?1.270) 0.291 ?0.299 (7.391 ?7.595) (note 2) 45 0.010 ?0.029 (0.254 ?0.737) note: 1. pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options. 2. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.006 inch (0.15mm). typical applicatio n s u package descriptio n u linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7487 (408) 432-1900 l fax : (408) 434-0507 l telex : 499-3977 lt/gp 0394 5k rev a ? printed in usa ? linear technology corporation 1994 lt1158 f18 i sc : 10a t shutdown = 50ms t restart = 600ms 0.01 m f 6.2k 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 boost t gate dr t gate fb t source sense + sense v + b gate dr boost dr v + bias enable fault input gnd b gate fb lt1158 1n4148 + on/off 10 m f 0.1 m f 51 w + ircz44 1000 m f + mbr330 + 10 m f 12v 12v 55w n package 16-lead plastic dip 0.260 ?0.010 (6.604 ?0.254) 0.770 (19.558) max 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0.015 (0.381) min 0.125 (3.175) min 0.130 ?0.005 (3.302 ?0.127) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.018 ?0.003 (0.457 ?0.076) 0.045 ?0.015 (1.143 ?0.381) 0.100 ?0.010 (2.540 ?0.254) 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.025 0.015 +0.635 0.381 8.255 () dimensions in inches (millimeters) unless otherwise noted.

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